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| lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 features system basis chip (sbc) for lin applications lin transceiver v2.1, v2.2, sae-j2602, iso9141 operating range 5v up to 28v, limited operating range 3.8v up to 40v typ. 10 a sleep current consumption 3.3v or 5.0v 2% in active mode, 5% in standby peripheral supply up to 100ma flash mode txd permanent dominant timeout configurable c window watchdog very low bus leakage current in case of short to gnd in sleep mode edge triggered lin remote wake-up vbat 6:1 voltage divider bus pin esd-protected > 8 kv (iec-61000-4-2) applications smart applications connected to the lin bus general description the lin-sbc with voltage regulator provides a lin transceiver, the peripheral supply, reset generatio n for the c and a watchdog. the lin sbc can be switched into standby- and sleep-mode which provides very low current consumption. the device is capable to detect local and remote wake-up events to enable the voltage regulator. a flash mode provides higher data rate for end of l ine flashing. ordering information ordering no.: vdd voltage temp. range package e52034c62c 3.3v -40c to +125c qfn20l5 E52035B62C 5.0v -40c to +125c qfn20l5 typical application circuit elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 1 / 33 qm-no.: 25ds 0060e.05
lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 functional diagram elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 2 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 pin configuration note: top view, not to scale. pin description pin name type description 1 vbat hv_s battery supply sense input for the voltage divider 2 n.c. not connected 3 wake_n a_i local wake up input, low active 4 n.c. not connected 5 vs hv_s battery supply voltage 6 gnd hv_s ground 7 n.c. not connected 8 lin hv_a_io lin bus terminal 9 n.c. not connected 10 res_n d_o reset output, low active 11 wdin d_i watchdog trigger input 12 wdosc a_i watchdog cycle time configuration 13 wddm d_i watchdog debug mode 14 en d_i enable input 15 txd d_io data transmit input 16 rxd d_o receive data output 17 div_on d_i input to switch on the internal voltage divider, active high 18 pv a_o voltage divider output 19 gnd s ground 20 vdd s peripheral voltage supply note: a = analog, d = digital, s = supply, i = input, o = output, b = bidirectional, hv = high voltage elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 3 / 33 qm-no.: 25ds 0060e.05 ela-0120 21 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 e520.34 / .35 txd en wddm wdosc n.c. wake_n n.c. vbat gnd n.c. lin n.c. res_n div_on pv gnd vdd wdin rxd vs lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 1 absolute maximum ratings stresses beyond these absolute maximum ratings list ed below may cause permanent damage to the device. these are stress ratings only; operation of the device at these or any other condi tions beyond those listed in the operational sectio ns of this document is not implied. exposure to absolute maximum rated conditions for extended periods may affect device reliability. all voltages with respect to ground. currents flowing into terminals are positive, those drawn out of a terminal are negative. description condition symbol min max unit dc voltage at pin vs continuous v s,dc -0.3 40 v junction temperature continuous t junc -40 150 c storage temperature continuous t stg -55 165 c dc voltage at pin wake_n continuous, with external r wake_n =3.3 k , c wake_n =22nf v wake_n,dc -2 v s + 0.3 v dc current at pin wake_n continuous i wake_n,dc -10 10 ma dc voltage at pin vdd e520.35 (5.0v device) continuous v dd,dc5.0 -0.3 5.5 v dc voltage at pin vdd e520.34 (3.3v device) continuous v dd,dc3.3 -0.3 3.6 v dc current at pin vdd continuous i dd,dc -130 1 ma dc input voltage at pin lin, vbat continuous v lin,dc , v vbat,dc -24 40 v tran input voltage at pin lin, vbat pulse for max. 500ms v lin,tran v vbat,tran -27 40 v dc voltage level for pin en,res_n,rxd,txd,wdin,wdosc, wddm, div_on continuous v io,dc -0.3 v dd,dc +0.3 v dc current level for pin en,res_n,rxd,txd,wdin,wdosc, wddm, div_on continuous i io,dc -10 1 ma elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 4 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 2 esd protection description condition symbol min max unit esd protection at pin lin aec-q100-002 (hbm), c=100pf, r=1.5k chip level v lin,esdhbm to gnd -8 +8 kv esd protection at pin vs aec-q100-002 (hbm), c=100pf, r=1.5k chip level v vsup,esdhbm to gnd -8 +8 kv esd protection at pin lin 1) iec 61000-4-2 c=150 pf, r=330 v lin,esd to gnd -8 +8 kv esd protection at pin vs 1) iec 61000-4-2 c=150 pf, r=330 with external c vs,rf =100nf v vsup,esd to gnd -8 +8 kv esd protection at all pins aec-q100-002 (hbm), c=100pf, r=1.5k chip level v pin,esdhbm -2 +2 kv esd protection at pin wake_n aec-q100-002 (hbm), c=100pf, r=1.5k chip level v wake_n to gnd -8 +8 kv esd protection at pin wake_n 1) iec 61000-4-2 with external r wake_n =3.3 k , c wake_n =22nf v wake_n to gnd -8 +8 kv esd protection at all pins aec-q100-011 (cdm), r=1 chip level v pin,esdcdm -500 +500 v esd protection at all pins aec-q100-003 (mm), c=200 pf chip level v pin,esdmm -200 +200 v 1) verified with capacitor of c lin =0pf, c lin =220pf at pin lin, c vs,rf =100nf at pin vs and c wake_n =22nf, r wake_n =3.3k at pin wake_n elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 5 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 3 recommended operating conditions description condition symbol min typ max unit full functional range vdd and lin within limits v s,func 5 - 18 v limited functional range, vdd keeps active i dd > -60ma v s,fl,lr 3.8 - 5 v limited functional range due to power dissipation and lin conformity v s,fl,hr 18 - 40 v ambient temperature t amb -40 - 125 c maximum io current at each pin, if not specified otherwise i io,lup -10 - 10 ma 4 thermal characteristics description condition symbol min typ max unit thermal resistance junction to ambient qfn20l5 package 1) according to jedec standard jesd-51-5 r tja - 22 - k/w 1) values are based on method according to jedec jesd -51-5. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 6 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 5 electrical characteristics (v s = +5v to +28v, t amb = -40c to +125c, unless otherwise noted. typical values are at v s = +12.0v and t amb = +25c. positive currents flow into the device pi ns.) description condition symbol min typ max unit power supply and references current consumption in active mode lin dominant, i dd =0ma i s,act,dom - 2.5 5 ma current consumption in active mode lin recessive, i dd =0ma i s,act,rec - 1.2 2 ma standby current standby mode, v s =v lin =v wake_n =13.5v, i dd =0ma, t j < 85c i s,stby - 70 98 a sleep current sleep mode, lin recessive, v s =v lin =v wake_n =13.5v, t j 40c i s,sleep,40 - 10 20 a sleep current sleep mode, lin recessive, v s =v lin =v wake_n =13.5v, t j > 40 c i s,sleep - - 25 a sleep current, lin is neither recessive nor dominant 1) sleep mode, lin is floating v s =v wake_n =13.5v i s,sleep,lin - - 60 a sbc operating modes debounce filter for active mode transition t 2am 23 25 44 s debounce filter for standby mode transition t 2stby 23 25 44 s debounce filter for sleep mode transition t 2sleep 23 25 44 s debounce filter for flash mode transition t 2fm 2 4 6 s flash mode acknowledge pulsewidth t fmack 3 s flash mode time out t fmto 1.2 - 2 ms delay for switching off the vdd regulator after entering sleep mode t dd,offdel 64 128 - s 1) not production tested elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 7 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 electrical characteristics (continued) (v s = +5v to +28v, tamb = -40c to +125c, unless othe rwise noted. typical values are at v s = +12.0v and tamb = +25c. positive currents flow into the device pins.) description condition symbol min typ max unit reset parameters power on reset according to pin vs v s,por 4.0 - 5.0 v power down threshold according to pin vs v s,pd 3.0 - 3.8 v reset assert level at pin vdd e520.34 (3.3v device) v dd,rsta3.3 2.4 - 2.8 v reset assert level at pin vdd e520.35 (5.0v device) v dd,rsta5.0 4.2 - 4.6 v reset release level at pin vdd e520.34 (3.3v device) v dd,rstd3.3 2.6 - 3.0 v reset release level at pin vdd e520.35 (5.0v device) v dd,rstd5.0 4.4 - 4.8 v reset hysteresis at pin vdd 1) e520.34 (3.3v device) v dd,rstd3.3 - v dd,rsta3.3 v dd,hyst3.3 100 - 400 mv reset hysteresis at pin vdd 1) e520.35 (5.0v device) v dd,rstd5.0 - v dd,rsta5.0 v dd,hyst5.0 100 - 400 mv res_n activation time t res_n 2 3 5 ms under-voltage debounce time t res_n, rsta 60 - 90 s monitor parameters thermal shutdown flag threshold t shdn 150 - 180 c thermal shutdown flag hysteresis 1) t hyst 5 - 22 k voltage regulator shut down debounce time t dd,shdn - 50 - s local wake up leakage current v wake_n =v s =18v i wake_n,leak -5 - 5 a input low level v wake_n,inl 2.5 3.0 3.5 v input high level v wake_n,inh 3.0 3.5 4.0 v input hysteresis 1) v wake_n,hyst 0.2 0.5 0.8 v pull up current v s < 28 v, v wake_n = 0 v i wake_n,pu -30 -10 - a input debouncing filter time t wake_n,db - - 25 s 1) not production tested elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 8 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 electrical characteristics (continued) (v s = +5v to +28v, tamb = -40c to +125c, unless othe rwise noted. typical values are at v s = +12.0v and tamb = +25c. positive currents flow into the device pins.) description condition symbol min typ max unit voltage regulator output voltage range e520.35 (5.0v device) active mode vs > 7v, i vdd > -60ma v dd,act5.0 4.9 5.0 5.1 v output voltage range e520.34 (3.3v device) active mode i vdd > -60ma v dd,act3.3 3.23 3.3 3.37 v output current range vdd accuracy 2% i dd,act -60 - - ma output current range vdd accuracy 5% i dd,act -100 - - ma output current limitation i dd,lim -230 - -130 ma voltage drop between pin vs and pin vdd e520.35 (5.0v device) 3.8v < v s < ( v dd,actxx + 300mv), -60ma < i dd v dd,ld60m - - 300 mv voltage drop between pin vs and pin vdd e520.35 (5.0v device) 3.8v < v s < ( v dd,actxx +50mv ), -5ma < i dd v dd,ld5m - - 50 mv power supply ripple rejection ratio 1) 10 hz to 100 hz 10 f capacitor at pin vdd, v s = 14v, i vdd = -15 ma psrr 50 - - db output voltage range 1) e520.35 (5.0v device) standby mode v dd,stby5.0 4.75 5.0 5.25 v output voltage range 1) e520.34 (3.3v device) standby mode v dd,stby3.3 3.135 3.3 3.465 v output current range standby mode i dd,stby -60 - - ma lin transceiver functional range lin transceiver v lin,vs 7 - 18 v recessive output voltage txd=high v lin,rec v s -1v - v s v dominant output voltage txd=low, v s =7.0v, r lin =0.5k to v s v lin,dom - - 1.2 v dominant output voltage txd=low, v s =18v, r lin =0.5k to v s v lin,dom1 - - 2.0 v receiver dominant level v lin,thdom - - 0.4*v s v receiver recessive level v lin,threc 0.6*v s - - v lin bus center voltage v lin,buscnt = (v lin,thdom + v lin,threc )/2 v lin,buscnt 0.475*v s - 0.525*v s v receiver hysteresis v lin,threc - v lin,thdom v lin,hys - - 0.175*v s v 1) not production tested elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 9 / 33 qm-no.: 25ds 0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 electrical characteristics (continued) (v s = +5v to +28v, tamb = -40c to +125c, unless othe rwise noted. typical values are at v s = +12.0v and tamb = +25c. positive currents flow into the device pins.) description condition symbol min typ max unit output current limitation v lin = v vs,max = 18 v i lin,lim 40 - 200 ma pull up resistance r lin,slave 20 33 60 k leakage current flowing into pin lin transmitter passive, 7v lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 electrical characteristics (continued) (v s = +5v to +28v, tamb = -40c to +125c, unless othe rwise noted. typical values are at v s = +12.0v and tamb = +25c. positive currents flow into the device pins.) description condition symbol min typ max unit en input low level range v en,inl - - 0.25*v dd v input high level range v en,inh 0.75*v dd - - v pull down resistor v en =5.0v r en,pd 80 150 220 k input leakage v en =0v i en,leak -5 - 5 a txd input low voltage range v txd,inl - - 0.25*v dd v input high voltage range v txd,inh 0.75*v dd - - v output low level range i txd =1ma v txd,out -0.3 - 0.6 v txd pull up resistor v txd =0v r txd,pu 80 150 220 k txd dominant detection txd = low, active mode t txd,to 6 10 14 ms rxd output low level range i rxd =1ma v rxd,out -0.3 - 0.6 v pull up resistance (e520.35 5v device) v rxd =0v v rxd,pu 3 4 6 k pull up resistance (e520.34 3.3v device) v rxd =0v v rxd,pu 3 5 10 k reset output low level range i res_n =1ma v res_n,out -0.3 - 0.6 v pull up resistance (e520.35 5v device) v res_n =0v r res_n,pu 3 4 6 k pull up resistance (e520.34 3.3v device) v res_n =0v r res_n,pu 3 5 10 k watchdog input low level range at pins wdin, wddm v wdin,inl - - 0.25 * v dd v input high level at pins wdin, wddm v wdin,inh 0.75 * v dd - - v pull down resistor at pins wdin, wddm v wdin =5.0v r wdin,pd r wddm,pd 80 150 220 k reference current v wdosc =1v i wdosc,ref - 14 - a external reference resistor r wd,osc 10 100 k watchdog cycle time for min/max limits see chapter 6.5 watchdog r wdosc =10k t wd,cyc10k 10.2 ms watchdog cycle time for min/max limits see chapter 6.5 watchdog r wdosc =100k t wd,cyc100k 100.2 ms elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 12 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 electrical characteristics (continued) (v s = +5v to +28v, tamb = -40c to +125c, unless othe rwise noted. typical values are at v s = +12.0v and tamb = +25c. positive currents flow into the device pins.) description condition symbol min typ max unit first trigger open window open window after res_n is released t wd,first 91 110 135 ms open window time d wd,ow - 0.5 * *t wd,cyc - ms closed window time t wd,cw - 0.5 * t wd,cyc - ms watchdog reset time t wd,res 414 512 645 s watchdog trigger pulse width t wd,cmd 8 - - s vbat voltage divider voltage divider 1) e520.34 (3.3v device) v s,pd < v bat < 18v dr pv,3.3v 5.86 5.95 6.04 - voltage divider 1) e520.35 (5v device) 5v < v bat < 28v dr pv,5v 5.86 5.95 6.04 - v bat input current v bat = 13.8 v i vbat - 150 - a reverse current v bat = -24 v i vbat_rev -1 - ma maximum output voltage at pv e520.34 (3.3v device) 18 v < v bat < 40 v v pv,max,3.3 v - 1*v dd - v maximum output voltage at pv e520.35 (5v device) 28 v < v bat < 40 v v pv,max,5v - 1*v dd - v input low level range v div_on,inl - - 0.25*v dd v input high level range v div_on,inh 0.75*v dd - - v input pull down resistance v div_on = 5 v r div_on,pd 80 150 220 k 1) not production tested, at higher v bat input voltage the output voltage at pin pv is limi ted to v dd level. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 13 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6 functional description the e520.34 /.35 is the interface between the physi cal bus in a local interconnect network (lin) and t he lin master / slave protocol controller according to lin v2.1 / v2.2 specification. the device provides loc al and remote wake-up capability in sleep and standby mode. a wak e-up source flag can be evaluated by the microcontr oller. the integrated txd dominant clamp timeout prevents the lin network from permanent distortion in case of ha rdware failure. the flash mode provides higher data rates on the lin pin for end-of-line or in-car flashing u p to 115 kbaud. the integrated voltage regulator supplies the micro controller and peripheral blocks with current up to 60ma (2% accuracy). a higher current up to 100ma can be supp lied with lower accuracy. for applications with a p ermanent supplied microcontroller a standby mode with active voltage regulator and low quiescent current consum ption is implemented. the cycle time of the integrated window watchdog ca n be configured by external resistor. for software development purpose the watchdog can be disabled. the integrated reverse polarity protected 6:1 volta ge divider can be connected to the battery supply t o measure the supply voltage with fast response time. to limit th e output voltage in case of vbat over-voltage a cla mping to the microcontroller supply voltage is integrated. 6.1 operating modes the e520.34 /.35 provides the following operation m odes: 6.1.1 power-off mode the device enters power-off mode in case the batter y voltage is lower than v s,pd voltage level. in power-off mode the voltage regulator is switched off. if the batte ry voltage rises above the power on reset threshold level v s,por the device resets the system via activating pin res_n. the device enters mode power-on. 6.1.2 power-on mode when the voltage at pin vs exceeds the power-on-res et threshold voltage v s,por , the device enters power-on mode. in that mode the voltage regulator is switched on. after pin vdd exceeds v dd,rstd , res_n is held low for t res_n . setting pin en to active high level for a time peri od of at least t 2am the device enters active mode. any wake-up request from mode sleep is indicated by setting the pin rxd to low level. the wake-up source can be recognized by the microco ntroller by reading the level at pin txd. a weak pu ll up indicates a remote wake-up request and strong pull down indicates a local wake-up request. note: the voltage regulator over temperature shut d own results in a transition to power-on mode and th e regulator is switched off. the voltage regulator will be swit ched on if the junction temperature cools down by t hyst . 6.1.3 active mode in active mode the device is able to transmit and r eceive data via the lin bus line. the receiver tran sfers the detected lin bus data via pin rxd to the microcontr oller: high at a recessive level and low at a domin ant level on the bus. the receiver has a debounced vs supply related threshold with hysteresis. the transmit dat a at the txd input is converted by the transmitter into a li n bus signal. the lin bus slew rate is optimized to minimize electromagnetic emission. the lin bus output pin is pulled high via an internal slave termination resi stor. for a master application an external termination network is needed. the device enters active mode from: standby mode whenever a high level on pin en is mai ntained for a time of at least t 2am flash mode after a time out of t fmto power on mode in case of a high-level on pin en, ma intained for a time of at least t 2am . elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 14 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.1.4 standby mode in standby mode the voltage regulator is activated. also the slave termination resistor at pin lin is enabled. the watch dog is running. any wake-up request is indicated by setting the pin rxd to low level. the wake-up source can be recognized by the microco ntroller by reading the level at pin txd. a weak pu ll up indicates a remote wake-up request and strong pull down indicates a local wake-up request. 6.1.5 sleep mode the sleep mode is a very low power mode of the devi ce. after entering standby mode a txd low level for at least t 2sleep changes to sleep mode. the transition to sleep mod e can be performed independently from the actual le vel on pin lin or pin wake_n. in sleep mode the voltage regulator is deactivated and becomes high omic aft er a delayed time of t dd,offdel . the transition into mode sleep is prohibited if a w ake-up request is pending. the request must be clea red via a transition to mode active. in sleep mode the intern al slave resistor termination at lin bus pin is swi tched off. a power-saving weak pull-up between pins lin and vs i s still present. the device can be woken up remotel y via pin lin or locally via pin wake_n. debounce filters pre vent unwanted wake-up events due to emi at the inpu ts of the wake-up sources. 6.1.6 flash mode the flash mode allows a higher transmit baud rate u p to 115 kbd and the receive baud rate up to 250 kb d. for further information see chapter ?lin flash mode?. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 15 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 fig. 1: sbc state diagram mode en vdd rxd txd lin watch dog power-off high ohmic off high ohmic high ohmic high ohmic off power-on low on strong pull down output for wake-up request weak pull up output if remote wake-up; strong pull down output if local wake- up off on after res_n is high active high on pull up for lin recessive; strong pull down output for lin dominant high level input for lin recessive; low level input for lin dominant on; slew rate control activated on standby low on strong pull down output for wake-up request weak pull up output if remote wake-up; strong pull down output if local wake- up transmitter off termination on on sleep low off pull up pull down off off flash high on pull up for lin recessive; strong pull down output for lin dominant high level input for lin recessive; low level input for lin dominant on; slew rate control deactivated on table 1: pin functionality elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 16 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.2 voltage regulator the on chip low drop voltage regulator provides the voltage v dd (typ. 3.3v or 5.0v depending on version e520.34 or e520.35) at pin vdd. it supplies the peripheral cir cuitry of the sbc and the host mcu chip with typica l 60ma (2%) or up to 100ma with lower accuracy. the voltage regulator is activated in all operating modes except in sleep mode. in sleep mode the volt age regulator is switched off. the voltage regulator output current is limited to i dd,lim . the current limitation is always activated. 6.3 lin transceiver 6.3.1 lin physical layer the lin bus interface is conform to lin physical la yer specification revision v2.1 / v2.2 and can be u sed for master or slave applications. the device has an int ernal slave termination implemented. master termina tion has to be applied externally. fig. 2: lin transceiver physical layer timing elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 17 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.3.2 lin flash mode in flash mode lin bus slew rate control is disabled to support high baud rate for microcontroller flas hing purposes via lin bus. flash mode is entered from standby mod e by a rising edge on pin en followed by a low puls e at pin txd for t fmack within the time period t 2am . the flash mode must be re-triggered within the ti me out t fmto otherwise the mode is left to active mode. fig. 3: flash mode transition timing with txd ackno wledge pulse. 6.3.3 lin txd dominant time out in order to prevent the lin bus from being permanen t dominant in case of permanent low level at pin tx d a time- out is implemented. the lin transmitter is disabled after t txd,to . the timer is triggered by a negative edge on pin txd and reset by a positive edge on pin txd. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 18 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.4 wake-up in case the device is in sleep or standby mode ther e are 2 events to wake-up the device: 1. local wake-up with low level at pin wake_n. 2. remote wake-up by lin any of these wake-up events changes the device mode from sleep mode to power-on mode. if a remote or local wake-up occurs in standby mode the device remains in this mode and a wake-up even t is signalized at pin rxd. a transition to sleep mode i s prohibited. 6.4.1 local wake-up the device can be woken up from sleep mode via pin wake_n. pulling pin wake_n below v wake_n,inl level results in a local wake-up request. the wake-up event is fa lling edge triggered. this allows the device to ent er sleep mode with pin wake_n pulled to low. the pin wake_n is an high voltage input with pull u p current source i wake_n,pu and an input debounce filter. if the local wake-up is not used in application, the pin w ake_n has to be connected to pin vs. fig. 4: local wake-up in mode sleep elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 19 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 fig. 5: local wake-up in mode standby and flash elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 20 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.4.2 remote wake-up the device can be woken up remotely from sleep and standby mode via pin lin. a falling edge at the lin pin followed by a dominan t bus level v lin,dom maintained for a time period t lin,wu with a following rising edge results in a remote wake-up. the wake-up request is signalized to microcontrolle r by a low state at pin rxd. fig. 6: remote wake-up in mode sleep elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 21 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 fig. 7: remote wake-up in mode standby 6.4.3 wake-up source signalization the device latches the information of the wake-up s ource to distinguish between a remote wake-up reque st via lin bus and local wake-up via pin wake_n. the wake-up s ource can be read on pin txd in the mode standby an d power-on. a high level at pin txd indicates a remote wake-up request (weak pull-up at pin txd) and a low level i ndicates a local wake-up request (strong pull-down at pin txd) . 6.4.4 wake-up flag reset the wake-up request flag and the wake-up source fla g are reset after entering active mode. the wake-up source signal at txd and rxd is interrupted while pin en i s set to high in order to check flash mode request at txd. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 22 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.5 watchdog the watchdog has to be triggered by high pulses at wdin in the open window time t wd,ow . a correct wd-trigger pulse in the open window starts the next closed win dow. any wd-trigger pulse in the closed window rese ts the watchdog and a reset will be activated on pin res_n for t wd,res . there is an enlarged first open window after a high transition at res_n. the first wdin trigger pulse is allowed to appear latest at t wd,fow . the watchdog starts with first open window after re entering active- or power-on mode. fig. 8: watchdowg triggger in closed window (cw) elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 23 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 fig. 9: no watchdog trigger in first open window (f ow) fig. 10: no watchdog trigger in open window (ow) elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 24 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.5.1 watchdog cycle time configuration the watchdog cycle time can be configured via the e xternal resistor at pin wdosc. the watchdog cycle p eriod t wd,cyc is defined by the external resistance r wd,osc by: t wd,cyc,min = 0.9 * (r wd,osc - 2k )* ms/k t wd,cyc,max = 1.1 * (r wd,osc + 2k )* ms/k t wd,cyc,typ = (t wd,cyc,max +t wd,cyc,min ) / 2 r wd,osc / k t wd,cyc,typ in ms 10 10.2 22 22.2 47 47.2 100 100.2 table 2: typical watchdog configuration examples watchdog safe area calculation: fig. 11: watchdog safe trigger area elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 25 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 fig. 12: watchdog safe area depending on watchdog c ycle-time ? range 20ms up to 100ms 6.5.2 watchdog debug mode for debugging purposes the watchdog can be stopped by pulling pin wddm to high. in this case the watch dog timer stops and the actual state remains. after set ting pin wddm to low level the watchdog keeps on ru nning. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 26 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.6 vbat voltage divider the integrated reverse polarity protected 6:1 volta ge divider can be connected to the battery supply t o measure the supply voltage with fast response time. to limit th e output voltage in case of vbat overvoltage a clam ping to the microcontroller supply voltage is integrated. the voltage divider is activated by the digital pin div_on. the divided input voltage is available at pin pv. in sleep and standby mode the div_on functionality is disabl ed and pv is off. an internal pull-down resistor is implemented. fig. 13: typical characteristic of the voltage divi der elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 27 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.7 fail safe behavior 6.7.1 reset parameters the regulator is switched on if the supply input vo ltage vs exceeds v s,por threshold and is switched off if the voltage at pin vs falls below v s,pd threshold. the slope of the falling edge after vdd regulator shutdown at pin vdd depends on the external buffer capacitance and the load current. the device enters power-off mode. the device powers up again if the battery voltage exceeds v s,por level again. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 28 / 33 qm-no.: 25d s0060e.05 fig. 14: power up and power down behavior for 3.3 v device vs 2v 6v 10v 14v vdd 2v v s,por v s,pd v dd,rstd 5v res_n 2v 5v t res_n tt t slope depends on external load lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.7.2 digital input pull-up / pull-down the digital input pins have internal pull-up or pul l-down sources for fail-safe operating conditions a ccording to the following table: pin termination reason wddm weak pull-down set wd active in case of floating pin wddm txd weak pull-up set txd input to defined level in ca se of floating pin txd en weak pull-down force sbc in sleep mode in case of floating pin en wdin weak pull-down terminates wd trigger input in ca se of floating pin wdin; results in activating res_n table 3: fail-save pin-termination table. 6.7.3 thermal shutdown the lin-sbc is protected against thermal stress. in case the junction temperature exceeds the shutdown temperature t shdn , the internal sbc thermal shutdown flag is set. th e flag is reset in case the junction temperature cools down by t hyst . depending on the cause for the over temperature (vo ltage regulator or lin transmitter) the sbc behaves different. in any case it shut down the detected heat source t o reduce power dissipation of the sbc. elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 29 / 33 qm-no.: 25d s0060e.05 fig. 15: power up and power down behavior for 5 v d evice vs 2v 6v 10v 14v vdd 2v v s,por v s,pd v dd,rstd v dd,rsta 5v res_n 2v 5v t res_n t d(res_n,rsta) tt t slope depends on external load lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 6.7.4 lin over current protection the output current of the lin transmitter is limite d to i lin,lim in order to protect the transmitter against short circuit to pin vs . in case the sbc thermal shutdown flag is caused by the lin transceiver the transmitter is disabled and the lin over temperature flag is set. the over temperature flag is reset and the lin tran smitter is enabled in case the junction temperature cools down by t hyst . the lin shut down does not result in any state c hange. 6.7.5 lin txd dominant timeout in case of txd dominant clamping the lin transmitte r is disabled after a dominant detection timeout. f or details see chapter 6.3.3 lin txd dominant time out. 6.7.6 voltage regulator over current protection in case of shorts at pin vdd the output current of the voltage regulator is limited to i dd,lim . in order to limit power dissipation of the device the voltage regulator is shut down if the thermal shutdown flag is caused by by the voltage regulator. a debounce filter of t dd,shdn is implemented. the voltage regulator is switched on again in case the junction temperature cools down by t hyst independently of pin en. the vdd shut down causes a mode change, if the pin vdd voltage drops below the vdd reset thres hold level v dd,rstaxx . in this case the device enters power-on mode. 6.7.7 lin loss of ground in case of battery voltage loss (pin vs) and ground loss (pin gnd) reverse current from the lin bus li ne is limited. 6.7.8 microcontroller reset in case the voltage at pin vdd drops below the rese t threshold v dd,rstaxx the sbc reset pin res_n is activated and pulled down to gnd. the reset pin res_n is released after t res_n if the vdd voltage exceeds the reset deactivation level v dd,rstdxx . fig. 16: res_n in case of vdd uv events elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 30 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 7 package information the device is assembled in a qfn20l5 package that i s comparable to the variant vhhc-2 of jedec standar d mo-220, issue k. the deviation is the size of the die paddle (typ. 2.75mm x typ. 2.75mm). description symbol mm inch min typ max min typ max package height a 0.80 0.90 1.00 0.031 0.035 0.039 stand off a1 0.00 0.02 0.05 0.000 0.00079 0.002 thickness of terminal leads, including lead finish a3 -- 0.20 ref -- -- 0.0079 ref -- width of terminal leads b 0.25 0.3 0.35 0.010 0.012 0.014 package length / width d / e -- 5.00 bsc -- -- 0.197 bsc -- length / width of exposed pad d2 / e2 2.60 2.75 2.90 0.1 02 0.108 0.114 lead pitch e -- 0.65 bsc -- -- 0.026 bsc -- length of terminal for soldering to substrate l 0.35 0 .40 0.45 0.014 0.016 0.018 number of terminal positions n 20 20 note: the mm values are valid, the inch values contains rounding errors elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 31 / 33 qm-no.: 25d s0060e.05 lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 32 / 33 qm-no.: 25d s0060e.05 warning ? life support applications policy elmos semiconductor ag is continually working to im prove the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing elmos semiconductor ag produ cts, to observe standards of safety, and to avoid situations in whi ch malfunction or failure of an elmos semiconductor ag product could cause loss of human life, body injury or dama ge to property. in the development of your design, please ensure that elmos semiconductor ag products are use d within specified operating ranges as set forth in the most recent product specifications. general disclaimer information furnished by elmos semiconductor ag is believed to be accurate and reliable. however, no responsibility is assumed by elmos semiconductor ag for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. no license is granted by implication or otherw ise under any patent or patent rights of elmos semiconductor ag. elmos semiconductor ag reserves the right to make c hanges to this document or the products contained therein without prior notice, to improve performance, relia bility, or manufacturability. application disclaimer circuit diagrams may contain components not manufac tured by elmos semiconductor ag, which are included as means of illustrating typical applications. consequ ently, complete information sufficient for construc tion purposes is not necessarily given. the information in the ap plication examples has been carefully checked and i s believed to be entirely reliable. however, no responsibility is assumed for inaccuracies. furthermore, such inform ation does not convey to the purchaser of the semiconductor de vices described any license under the patent rights of elmos semiconductor ag or others. lin sbc with voltage regulator and watchdog e520.34 / .35 production data ? may 20, 2015 elmos semiconductor ag reserves the right to change the detail specifications as may be required to pe rmit improvements in the design of its products. elmos semiconductor ag data sheet 33 / 33 qm-no.: 25d s0060e.05 contact information headquarters elmos semiconductor ag heinrich-hertz-str. 1 ? d-44227 dortmund (germany) Y : +492317549100 : sales-germany@elmos.com : www.elmos.com sales and application support office north america elmos na. inc. 32255 northwestern highway ? suite 220 farmington h ills mi 48334 (usa) Y : +12488653200 : sales-usa@elmos.com sales and application support office china elmos semiconductor technology (shanghai) co., ltd. unit 16b, 16f zhao feng world trade building, no. 369 jiang su road, chang ning district, shanghai, pr china, 200050 Y : +86216210 0908 : sales-china@elmos.com sales and application support office korea elmos korea b-1007, u-space 2, #670 daewangpangyo-ro, sampyoung-dong, bunddang-gu, sungnam-si kyounggi-do 463-400 korea Y : +82317141131 : sales-korea@elmos.com sales and application support office japan elmos japan k.k. br shibaura n bldg. 7f 3-20-9 shibaura, minato-ku, tokyo 108-0023 japan Y : +81334517101 : sales-japan@elmos.com sales and application support office singapore elmos semiconductor singapore pte ltd. 3a international business park #09-13 icon@ibp ? 609935 singapore Y : +65 6908 1261 : sales-singapore@elmos.com ? elmos semiconductor ag, 2015. reproduction, in part or whole, without the prior written consent of elmos semiconductor ag, is prohi bited. |
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